Contents

• 1 Silicon Hit Finding on the PowerPC boards: the framework
  • 1.1 Hardware
  • 1.2 Data flow
  • 1.3 Memory
  • 1.4 Readout options
    • 1.4.1 Modes
    • 1.4.2 Power PC masks
    • 1.4.3 Other options and parameters
  • 1.5 Data formats
    • 1.5.1 Raw data
    • 1.5.2 PPC-formatted data
    • 1.5.3 Constants
  • 1.6 Compiling and loading code
  • 1.7 Main User Routine
• 2 Routines for the CST
  • 2.1 Data Formats
    • 2.1.1 PPC output
    • 2.1.2 Pedestals & Sigmas
  • 2.2 Initialization
  • 2.3 Hit Finding
    • 2.3.1 Handling Special Voltages
  • 2.4 Constant Updating
• 3 Routines for the BST
• A BOS Bank Formats
  • A.1 Front End banks
  • A.2 CST Reconstruction banks
  • A.3 BST reconstruction banks
• B List of Subroutines
  • B.1 CST
• References
• About this document ...