Pedestals are kept at Memory address $0040'0000. 32-bit words are being used, and blocks of (1280 strips 8 FADCs) words are stored for 32 Pipeline Buffers consecutively.
| $0040'0000: | PIC 0, FADC 0 |
| $0040'1400: | PIC 0, FADC 1 |
| $0040'A000: | PIC 1, FADC 0 |
In contrast to the Raw data order, the pedestal words for every FADC are stored sequentially, i.e. each FADC has its `own' coherent memory block. The total size of the Pedestal Block is .
Sigmas are kept at Memory address $0020'0000. Rather than keeping just the rms noise sigma, a quadruple is stored for each strip:
( Variance, Pulse Height Sum, Pulse Height Sum Squared, Counts).