1 Silicon Hit Finding on the PowerPC boards: the framework

  The RIO2 PowerPC boards are responsible for reducing the Silicon data size before they are picked up by the VMEtaxi. Moreover, they have to provide multi-event buffering to allow running the hit detection algorithms asynchronously to the H1-L2 trigger signals.

The readout task is basically split into two levels: the main readout routine and the subdetector specific hit detection and updating algorithms. Communication between the two levels is established via input and returning arguments. Additional information for the hit finding is obtained from the PPC memory.

• 1.1 Hardware
• 1.2 Data flow
• 1.3 Memory
• 1.4 Readout options
  • 1.4.1 Modes
  • 1.4.2 Power PC masks
  • 1.4.3 Other options and parameters
• 1.5 Data formats
  • 1.5.1 Raw data
  • 1.5.2 PPC-formatted data
  • 1.5.3 Constants
• 1.6 Compiling and loading code
• 1.7 Main User Routine