SiVMEXI Memory Map

$0000'0000 - $00FF'FFFF	VME A24 D32
$0100'0000 - $0EFF'FFFF	VME A32 D32
$0Fxx'0000 - $0Fxx'FFFF	VME A16 D32

$1000'0000 - $1001'FFFF	Fast static RAM (local)
$1020'0000 - $103F'FFFF	Extension RAM if 2 MBytes (local)
$1030'0000 - $1037'FFFF	Extension RAM if 512 KBytes (local)

$2020'0000 - $203F'FFFF	Link to Extension RAM transfer if 2 MBytes
$3020'0000 - $303F'FFFF	Extension RAM to Link transfer if 2 MBytes
$2030'0000 - $2037'FFFF	Link to Extension RAM transfer if 512 KBytes
$3030'0000 - $3037'FFFF	Extension RAM to Link transfer if 512 KBytes

$4000'0000 - $4007'FFFF	EPROM
$4400'0000 - $4400'000F	Serial link interface
$4800'0000 - $4CFF'FFFF	Control, commands and register

$5000'0000 - $5FFF'FFFF	VME to Link transfer
$6000'0000 - $6FFF'FFFF	Link to VME transfer
$7000'0000 - $7FFF'FFFF	VME to Link block transfer
$8000'0000 - $8FFF'FFFF	Link to VME block transfer

$9000'0000 - $90FF'FFFF	VME A24 D16
$9100'0000 - $9EFF'FFFF	VME A32 D16
$9Fxx'0000 - $9Fxx'FFFF	VME A16 D16

$A000'0000 - $AFFF'FFFF	VSB access

$B000'0000 - $BFFF'FFFF	VSB to Link transfer
$C000'0000 - $CFFF'FFFF	Link to VSB transfer
$D000'0000 - $DFFF'FFFF	VSB to Link block transfer
$E000'0000 - $EFFF'FFFF	Link to VSB block transfer


$1000 '0000 -	$1001 'FFFF	LOCAL VMEtaxi INTERNAL SRAM  
	<	$1000 '1FD0	VMExi2_SSP Stack
$1000 '1FF0 -	$1000 '206F 	Ram Configuration Area (from EEPROM)
		$1000 '1FF4	Set up location
		$1000 '1FF8	JSR Address location (32-bit)
		$1000 '1FFC	VMEtaxi number (byte)
		$1000 '1FFD	xiMON Command Box Location (upper 3 bytes)
$1001 '0000			VMExi2_SSP : Program Origin
$1020 '0000 -	$103F'FFFF	XRAM
$1030 '2000 - 	$1030 '206F	User Ram Configuration Area
		$1030 '2060	VMEXI_SSP Multifunction enabling byte
		$1030 '2061	VMEXI_SSP XIDAQ FEB CAS enabling byte
		$1030 '2062	VMEXI_SSP terminal i/o disabling word
		$1030 '2F00	VMEXI_SSP xiMON Command Box			
$1030 'E000 -	$1030 'FFFF	Xram used by XIDAQ internally
$1031 'A000 -	$1031 'FFFF	Xram used by XIDAQ for external communication
		$1031 'A000	VMEXI_SSP : Internal XIDAQ Status Block address (DAQSTADD)
		$1031 'E000	VMEXI_SSP : Mac/External proc. Command Address (MACCOMA)
		$1031 'E100	VMEXI_SSP : XIDAQ Status Table Address (MACSTA)
		$1031 'E200	VMEXI_SSP : XIDAQ Message address (MACMSSA)
		$1031 'E400	VMEXI_SSP : XIDAQ specification block input (for DAQSPEC)
		$1031 'E800	VMEXI_SSP : Event Number ready status block (EVSTATUS).

$4000 '0000 -	$4007 'FFFF	EPROM

$4400 '0000 -	$4400 '000F	Serial link interface

$4800 '0000 -	$4CFF 'FFFF	Control, commands and registers

		$48200000	Message Send register, transmitter latch STRC strobe
		$48200000	Message Receive register, receive fifo register 
		$4C200000	Status register
		$4C200010 	Write AA28-AA31, Memory mapping register, byte abcdxxxx
		$4C200020	Write Byte ABCXXXXX  A=EEDIN, B=EESK, C=EECS
		$4C200044	User led address
		$4C200048	D8=DPRS2, D9=DPRS2
		$4C20004C 	TAXIchip reset
		$4C200800	MBXEN low
		$4C200C00	MBXEN high
		$4C207000	Bypass data D15 SELC
		$4C206002	Long   data D15 SELC2
		$4C208C80	Short command bit 0
		$4C208D00 	Short command bit 1
		$4C208D80	Short command bit 2
		$4C210000 	Clear REGZ = 0  (after reset)
		$4C210400 	Set   REGZ = 1
		$4C210800 	Clear DPRSEL
		$4C210C00 	Set   DPRSEL
		$4C218000	VSBMODE=0
		$4C218400	VSBMODE=1
		$4C220001	SYSRES
		$4C240001	RESM1 (D23)
		$4C260001	RESM2 (D23)
		$4C280001	Watchdog
		$4C2A0001	VMEMODE (D23)
		$4C600003	RQSEL D7-line
		$4C700003	RQS2 (fifo half full bit 7)
		$4CA00000	Toggle IRQ5* output
		$4DA00000	Toggle SYSFAIL* output
XILINX
		$4C200020	Write byte, bits=AB00 0000   A=LCADAT B=LCACLK
		$4C202000	CLRAL L, active (to clear FIFOs, LCA) 
		$4C203000	CLRAL H, inactive 
		$4C204000	LCACOM line, data bit d15
		$4C205000	LCADP status at D15
		$4C208400	CLRST => H to clear IC54,55
		$4C208000	CLRST => L
	
Status Register (4C20'0000) Bits:	

		Bit 0	Short command bit 0
		Bit 1	Short command bit 1
		Bit 2	Short command bit 2
		Bit 3	Pattern violation channel A
		Bit 4	Alarm, logical sum of certain command and violation bits
		Bit 5	Long command received when reading FIFO
		Bit 6	Reserved for block counter from Xilinx
		Bit 7	/EM, Not empty FIFO
		Bit 8	FIFO full receiver A
		Bit 9	FIFO full receiver B
		Bit 16	Short command 0 channel B
		Bit 17	Short command 1 channel B
		Bit 18	Short command 2 channel B
		Bit 19	Pattern violation channel B