Silicon vertex detectors have become standard equipment of large
collider experiments[1, 2, 3, 4, 5, 6].
They provide position resolutions of around 15 
m
at the expense of a large number of readout channels concentrated in a
small volume. This requires VLSI frontend electronics which have the
task of signal amplification and of keeping the data
until a trigger decision initiates multiplexed readout. Up to now
the time between bunch crossings exceeded the trigger decision time
(e.g. at LEP, SLC and Tevatron),
allowing the readout of a triggered event
to be finished before the following bunch crossing would occur.
At HERA the time between collisions is only 96 ns and the data of typically the last 25 bunch crossings have to be stored in a data-pipeline at the frontend to await a trigger decision. A chip incorporating 128 channels of preamplifiers and 32 buffer deep analog pipelines (APC128)[7] has therefore been developed for the Central Silicon Tracker (CST) of H1[8].
In this paper we describe the control of the APC128 via digital signals
transmitted through optical fibers, and the optical
transmission of the analog data.
Optical communication has
the advantage of immunity against electromagnetic interference and moreover
of less material in front of other detectors ( 
).
A suitable fiber diameter and signal transmission speed allows for a
solution with low power consumption at the frontend.
The design includes the transmission of some slow control
values (voltages, temperatures), and monitoring the transmission
of the 34 m long optical lines which are composed of three cables coupled
together with two optical connections.
Optical data transmission is already in use for the L3 microvertex detector [6], where the signals are digitised near the frontend and the zero-suppressed digital data is transferred via optical fibers[9]. This requires cooling of the FADC units inside the detector. Optical analog data transmission has also been used before [10].