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Calibration and Slow Control via the Decoder Chip

An important part of our detector with no access during most of the year is a sophisticated monitoring and calibration system. These control tasks are also performed by the decoder chip.

Calibration signals can be distributed to each preamplifier input of the APC128 by means of a shift register on the decoder chip running synchronously with the Pipeline Shift Register on the APC128, and the 32 bit Calibrate Register which determines which of the 32 pipeline buffers will be filled with the calibration pulse.

The decoder chip is equipped with a DAC that is connected to the seven bit Current Supply Register. The output of the DAC drives a current source on the hybrid (pnp-transistor SA MMBTA56) for the preamplifiers on the APC128 chip.

For calibration of the analog readout chain and other control functions, the LED driver can be supplied sequentially with a set of voltages (see figure 3) denoted by Temp.Control, V tex2html_wrap_inline440 ,V tex2html_wrap_inline442 and V tex2html_wrap_inline444 in figure 5. The voltages V tex2html_wrap_inline440 and V tex2html_wrap_inline442 are derived from a reference voltage obtained from an AD580 chip on the hybrid, and serve for calibration of the transmission line. V tex2html_wrap_inline444 is the voltage for the APC128 preamplifiers as generated by the current source. A drift of V tex2html_wrap_inline444 at fixed current can be caused by radiation-induced threshold voltage shifts in the CMOS transistors. By repeated reloading of the 8 bit Slow Control Register, V tex2html_wrap_inline440 , V tex2html_wrap_inline442 , V tex2html_wrap_inline444 and an NTC resistor for temperature measurement are connected to the output stream, and the data appended to each event.



Markus Kausch
Tue Jun 25 14:34:46 MST 1996