The TSCD bank

The TSCD bank contains the history of the pad trigger data (24 time slices).

Header (four 32bit words)

Contents (24 64bit words):

Bit
	63______56	55______48	47______40	39______32	31______24	23______16	15______8	7______0
	pipe depth	read depth	card nb.	slice nb.	RAM 0	RAM 1	RAM 2	RAM 3

where:

pipe depth - The programmed pipeline depth of the PQZP card; currently $18.
read depth - The readout depth in the bank; currently also $18.
card nb.   - The number of the PQZP store card; currently 0.
slice nb.  - The actual slice of the pipeline; approaches from the past (slice 24) to the trigger point (slice 0).
RAM 0      - The contents of store card's RAM 0 (top right connector); currently output of pad sectors 0/1.
RAM 1      - The contents of store card's RAM 1 (top left connector); currently output of pad sectors 2/3.
RAM 2      - The contents of store card's RAM 2 (bottom right connector); currently output of pad sectors 4/5.
RAM 3      - The contents of store card's RAM 3 (bottom left connector); currently output of pad sectors 6/7.

The contents of the RAMs are subject to the respective XILINX configuration having been in effect during the DAQ run. For detailed information on the mapping and interpretation of data refer to the configuration experts.

Back to the Shift Instructions. To the BST site.