Forward Tracker Scintillator Trigger (FTST)

1. Purpose

The FTD upgrade requires the removal of the forward MWPC's which will destroy the current forward ray trigger. Although this will, to some degree, be replaced by the new CIP z-vertex trigger, the very forward region, theta < 12 degrees, will not be covered.
The intention is to add a new trigger system, the FTST, based on scintillation counters which will cover upto a theta of approx 17.0 + degrees and:

2. General Layout

The proposed system consists of two separate planes of scintillation detectors :-

3. Outstanding Detector Design Issues

3.1 FTST-1

3.2 FTST-2
Clearly Type c. would involve the most expense and require specific expertise in several areas.
One of these designs could also be used for FTST2.

3.3 R & D

R&D required in the following areas :

4. System Specifications

4.1 Scintillator

  1. Bicron Type BC-412 (Available)
    Rise Time 1.0 ns
    Decay Time 3.3 ns
    Pulse Width,FWHM 4.2 ns
    Light Attenuation 210 cm
    Wavelength of 434 nm
    maximum emission
    Density 1.032 g/cc
    Ref. Index 1.58
  2. Bicron Type BC-412 (Available)
    Rise Time 1.0 ns
    Decay Time 3.3 ns
    Pulse Width,FWHM 4.2 ns
    Light Attenuation 210 cm
    Wavelength of 434 nm
    maximum emission
    Density 1.032 g/cc
    Ref. Index 1.58
4.2 WLS Bar
* Note that although faster WLS is obtainable eg. Type BC-480 (5 ns decay and pulse width) the combination of BC-412 and BC482A is well suited to the current preamplifier design,which has a time shaping constant of 30 ns.The overall detector design is a compromise between several factors, including timing and S/N ratio,at the moment it is not known which is the best compromise.

4.3 WLS Fibres

4.4 Photodetectors
4.4.1 PM's
4.4.2 HPD's
Hamamatsu Hybrid Photodetector with Si-diode Target:
Spectral Response 160-850 nm
Wavelength of max.response 420 nm
Photcathode Material Multialkali
Photocathode effective area 8 mm dia.
Window Synthetic Silica
Target 7mm Single-element electron
bombarded Si diode
Weight 13.8 g
4.5 HPD Pre-amplifiers
4.6 Trigger Logic & Readout

FULL LOGIC AND READOUT REQUIREMENTS - TO BE PROVIDED 4.8 HV System**
4.9 Diode Bias System**
4.10 LV System**
** Careful design,layout and integration of all voltage supplies needed.
4.11 Cables and Connectors

5. Calibration/Test Pulse System

6. Slow Controls
7. Hardware Cost

8. Time Schedule

9. Manpower
Effort required for following areas:

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